JANOLI International Journal of Electronics, Computer Sciences and Engineering (JIJECSE) | JANOLI International Journal
ISSN: XXXX-XXXX

Volume 1, Issue 1 - Jan 2025

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“Secured Automobile Security System: GSM Technology and Electronic Circuits”

Manoj Kumar Chaturvedi , Assistant Professor Leszek Ziora, Assistant Professor

This paper presents the design and implementation of a GSM and electronic circuit-based security system to enhance automobile safety and prevent vehicle hijacking. Given the increasing threat of car theft, the study explores the effectiveness of modern security technologies over traditional measures. Using a qualitative research approach, data was collected through expert interviews and prototype testing to analyze the system’s functionality, response mechanisms, and user experience. Findings reveal that real-time alerts and automated lockdown features significantly enhance security. However, challenges such as network dependency and occasional false alarms indicate the need for further refinement. The study highlights the system’s comparative advantages over traditional security methods while emphasizing areas for future development in integrating advanced security features.

Download PDF Published: 06/03/2025

Detecting and Eliminating Malware: Improving Cybersecurity Strategies

Dr Tomasz Turek, Assistant Professor

Malware remains a significant cybersecurity threat, necessitating effective detection and removal strategies. This study critically examines various detection techniques, including signature-based detection, heuristic-based approaches, and behavioral analysis. Through a qualitative methodology that incorporates literature review, expert interviews, and case studies, the research identifies key challenges and best practices in malware detection. Findings indicate that while signature-based methods provide a solid foundation, heuristic and behavioral techniques significantly enhance detection accuracy and response efficiency. The study underscores the necessity of hybrid detection approaches and continuous adaptation to evolving threats. Recommendations include layered security strategies and ongoing refinement of detection algorithms to combat emerging malware variants. Future research should further explore adaptive methodologies and novel threat landscapes to enhance cybersecurity resilience.

Download PDF Published: 31/03/2025

Improving the Wireless Communication Co-axial Feed Rectangular Patch Antenna on High Impedance Surface

Pradeep Upadhyay, Professor

The increasing demands of wireless communication systems necessitate advancements in antenna technology to enhance performance metrics such as bandwidth, gain, and directivity. Microstrip patch antennas, known for their compact size and cost-effectiveness, suffer from limitations like narrow bandwidth, low gain, and surface wave interference. This study investigates the impact of incorporating a High Impedance Surface (HIS) as a reflecting ground plane to address these challenges. A quantitative approach is adopted, analyzing key parameters, including bandwidth, gain, surface wave suppression, and directivity, through experimental setups conducted from 2020 to 2023. The findings confirm that HIS significantly enhances bandwidth (by 20%), improves gain (by 15%), reduces surface waves (by 25%), and increases directivity (by 10%). Comparative analysis also reveals superior performance of HIS-based designs over conventional microstrip patch antennas. These results contribute to the advancement of wireless communication technology by demonstrating the effectiveness of HIS in optimizing antenna performance. Future research should explore diverse HIS configurations under varying environmental conditions to further refine antenna design strategies.

Download PDF Published: 14/04/2025

“Investigation of Switchable Microstrip Line Open Stub Resonator Designs for Improved Isolation of SPDT PIN Diode Switches”

Dr K K Lavania, Assistant Professor

This study investigates switchable microstrip line open stub resonator designs aimed at improving isolation and miniaturizing the circuit size of Single-Pole Double-Throw (SPDT) PIN diode switches for wireless communication applications such as WiMAX and LTE at the 3.5 GHz band. The research employs a quantitative approach to analyze the impact of novel resonator configurations on isolation performance and size reduction. Five research questions address the effectiveness of different resonator designs, their impact on circuit miniaturization, and their performance evaluation using two-port network modeling, simulation techniques, and empirical validation. The results demonstrate that the first resonator design significantly enhances isolation, exceeding 30 dB, while the second resonator design achieves a 34% size reduction without compromising performance. Advanced two-port network modeling and simulation methodologies are validated against experimental results, confirming their reliability in predicting resonator behavior. The study highlights the importance of optimizing resonator design parameters to enhance isolation and compactness, contributing to improved efficiency in wireless communication systems. Future research should explore alternative materials and extended frequency bands to further refine resonator performance.

Download PDF Published: 06/03/2025

“A New CMOS Dynamic Comparator for High-Speed Analog-to-Digital Converters”

Ivanenko Liudmyla, Assistant Professor

This paper presents a novel CMOS dynamic comparator designed to enhance the performance of high-speed analog-to-digital converters (ADCs). The proposed comparator replaces the traditional back-to-back inverter latch with a dual-input single-output differential amplifier, improving noise immunity, reducing power dissipation, and increasing speed. Five key research questions are explored: noise immunity, power dissipation, speed, circuit area, and robustness against transistor mismatch. The study employs quantitative analysis using Cadence Virtuoso with GPDK 90nm technology to validate the design. Simulation results confirm significant improvements in signal-to-noise ratio, power efficiency, response time, layout compactness, and robustness. The findings suggest that the proposed design advances comparator technology, making it more suitable for high-speed and power-efficient applications. Future work should involve real-world testing and further optimizations to enhance performance.

Download PDF Published: 06/03/2025